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SAN JOSE, CALIFORNIA -- Intel provided a glimpse at the future of its high-end Itanium processor, showing a multicore design of the CPU during a Tuesday demonstration here at the Microprocessor Forum conference.

John Crawford, an Intel Fellow, provided an example of what a four-core, Itanium-based processor might look like, although Intel is not expected to deliver such a processor until 2005 or 2006. Putting four processor cores on a single chip could provide a large performance boost for Itanium-based servers and alleviate problems such as heat dissipation.

Crawford showed how Intel could package four of its Itanium 2 processors to share one, large cache. Intel has promoted the use of a large cache in its Itanium chips as a way to provide a high-speed bridge between the processor cores and memory. Crawford would not say when the chips would come out or whether Intel would offer a four-core design before a two-core design, but did confirm that Intel is working on this type of technology.

"This is imminently doable," Crawford said, during his keynote presentation. "You can expect things of this nature coming out."

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IBM has already started shipping a dual-core Power4 processor in servers based on AIX, its version of Unix. Hewlett-Packard and Sun Microsystems are also expected to start shipping dual-core chips in systems based on their own flavors of Unix, respectively HP-UX and Solaris, next year. Intel, however, has said in the past that it will not produce a multiple-core Itanium chip until the middle of the decade.

By spreading out four processor cores around a shared cache, Intel could reduce the amount of heat generated by its chips, Crawford said. The demonstration of the four-core processor showed two cores on each side of the cache. This would place the hottest parts of each processor at some distance from each other.

Along with multicore processors, Intel is planning to bring its hyperthreading technology to the Itanium chips. Hyperthreading makes one processor appear as multiple processors to software and can provide a performance boost for applications that are written to take advantage of the technology.