Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), the world's largest contract chip maker, is offering companies a way to make chips that are faster, consume less power and cost less than is possible with 65-nanometer (nm) process technology.
Process technology is the chip maker's recipe for making chips. Generally described in nanometers, or billionths of a meter, these numbers refer to the average size of a feature that can be created on the chip.
At present, the most advanced process used for production is the 65-nm process. The next major advance in process technology is a shift to 45nm, which is expected to start later this year when Intel Corp. begins producing microprocessors with that process.
But TSMC says its ready to begin making chips with a 55-nm process that can be used with "minimal risk and effort" to manufacture chips designed for the 65-nm process. The 55-nm process will allow chip vendors to benefit from advances in technology, while gearing up for an eventual shift to a 45-nm process.
"The process delivers significant die cost savings from 65nm, while offering the same speed and 10 to 20 percent lower power consumption," TSMC said in a statement.
A die is the segment of a silicon wafer that becomes an individual chip. Reducing the die size shrinks per-unit manufacturing costs because more chips can be produced on a single wafer.
TSMC will be ready to begin production using the 55-nm process from early May.