Four years ago, Intel and Micron partnered to form Intel-Micron Flash Technology. The operation is based in Lehi, Utah, at this sprawling fabrication plant nestled in a hilly landscape. The two-level installation is actually built into the hillside. We had the chance to go inside and glimpse some of the manufacturing steps that go into creating flash memory. Join us on the journey.
What’s Made Here: The Silicon Wafer
Inside sits fully automated machinery for fabricating 300mm circular wafers like this one. Such a wafer can contain a few thousand gigabytes of storage space. Once manufactured, it can be broken into smaller segments for use in various consumer devices that rely on flash memory.
Once visitors have suited up head-to-toe in clean-room “bunny suits,” they can go inside. We were immediately struck by the size of the facility--one gleaming white corridor after another. Our second impression: There are very few people in sight. That's because machines do most of the heavy lifting. Technicians are on hand to adjust equipment, but they do their work largely behind the scenes. Note the tracks along the ceiling…
The next thing a visitor notices is the movement overhead. The ceiling is lined with a complex system of tracks, along which scoot transport cars--some empty, and some containing the amber canisters known as a “FOUP” (shorthand for "Front Opening Unified Pod"). The transport cars move the FOUPs throughout the plant, from one stage of the manufacturing process to the next.
The transport vehicles move along the tracks (shown in the foreground and background of this image) at a speed of several meters per second; and as they do so, they emit a high-pitched whine. This audio backdrop remains a constant feature of our tour.
The fabrication plant incorporates an Automate Material Handling System (AMHS), which moves canisters containing the wafers-in-process about through the various steps of manufacturing. The AMHS, which consists of hardware and software components, schedules the FOUPs for delivery to each manufacturing station. Here we see a mechanized apparatus securing itself to a FOUP so that it can carry the FOUP up to a waiting transport vehicle.
In this image, we see a FOUP waiting in the foreground as wafers go through a process; in the background, a second FOUP is being lifted up to the transport vehicle.
Here we see a row of FOUPs in the midst of the manufacturing process. Each canister bears an RFID barcode, which the Automated Material Handling System uses to determine where that particular canister should go next. The plant machinery usually removes wafers from the FOUP in batches of five, processes them in manufacturing one at a time, and returns them to the FOUP for the next stage of processing.
IThis image shows the “bay” side of the manufacturing process. Behind the wall is the area called the "chase," where the equipment lies--and where technicians make any necessary adjustments.
The chase shown here is crowded with overhead pipes that deliver the necessary chemicals and gases to the manufacturing machines.
This image shows the corridor where wet processing takes place. To accommodate drains and support equipment for the tools, IMFT had to install a platform with room underneath for the support system.
Photolithography is the most complicated part of the manufacturing process. Here, the lithographic tools print smaller and smaller geometric patterns to form the memory cells. The machinery operates in yellow light to avoid any unwanted exposure of the wafers. Inside the photolithography area, wafers transported via a FOUP pass through a photoresistant coating operation, then receive patterning, and finally undergo a development cycle in which equipment transfers the pattern to the wafer surface. Subsequent processing etches the pattern into the silicon wafer.
25nm: The Final Product Close Up
Here's a close-up look at the 25nm flash produced from this process. With 24nm flash, IMFT will be able to produce 2-bits-per-cell MLC NAND flash with 8GB of storage on a single 167mm flash die. That's twice the capacity that the previous 34nm process could achieve.
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