After being frankly astounded by AMD’s demonstration of its Zen microprocessor on Wednesday, we simply had to sit down with AMD chief technical officer Mark Papermaster to find out more. Below is our interview, lightly edited for length and clarity. (Confused by what we’re talking about? You might want to read our Zen performance report before diving in.)
PCWorld: Wow. Leading up to this, there were a lot of doubts on the Internet about Zen’s performance, that it could be lower than Intel’s Ivy Bridge. Clearly, you guys have demonstrated that you can run with Intel’s biggest dogs.
Papermaster: What we said a year ago—I guess it was in May, at the financial analysts’ meeting, and I know when I put down that 40-percent IPC number, I got a lot of looks back, saying, “Really?” But the team was so focused. It was a very proud team at AMD. And they’ve had such a history of great designs.
And as I showed in my presentation, it’s been innovation after innovation. We had let a gap develop in CPU performance. This was a great job by the team, to bring us back.
Zen had been in development for how long?
Not quite four years.
Clearly you’re in a chess game with Intel. And tomorrow, when Intel reads these stories, I wonder if they’re going to cut prices. Do you keep prices low and go for as much volume as you can with Zen, or keep them high and raise your profit margins?
As you heard Jim Anderson say, who runs that business, they’ll make those pricing decisions on those products. But the main thing we’re showing today is just that: We don’t want any of that fear, uncertainty, and doubt.
We’re working with OEMs and ODMs. And as we come up to shipment, and the timeframe that we described today, the market should be confident. We’re confident. Our customers—we’re working with them under NDA—they see the restricted information. But there’s no reason to have the market doubting if we’re real, if we hit the performance target we set out for with the Zen core. We did. That’s what we were able to not only share with you today, but also demonstrate.
Would you say that the CPU wars are back on again, after being on a break for the past few years?
There’s always been competition, or the CPU wars. What we did is we drove an incredible efficiency in the CPU roadmap that we showed you here tonight. So if you look at the “Excavator” core, the previous generation that we compared for you, it does amazingly well if we target its sweet spot, which is in our PC market.
Look at some of the 7th generation APUs leveraging that Excavator. It’s in 28-nanometer. It’s in great performance per watt, it’s got the Radeon graphics with it, the battery life is a massive jump over the previous generation. But the war we’re bringing back is to high performance. We’re bringing competition back to high-performance x86.
What about more average users, who don’t care about such high-end performance? When do we get a quad-core Zen?
Well, we’ll start with the desktop configuration we [talked about] today. And when you think about the rest of the markets, you’ll see it permeate, as we complete that Zen rollout. What we said was that in the second half of 2017 there will be an APU—take that same Zen core and bring it into an APU configuration. We didn’t release too far in advance the details of that, but that’s when you’re going to see the permeation right into our mobile PC markets.
So it really will scale? You’ll be able to get Zen into a laptop, with reasonable power?
It’s designed for scalability. The key points I made are twofold: microarchitecture and design methodologies. I showed you this whole history of our prior cores; there was no FinFET. What I showed you was a bigger gap in [our] foundry versus Intel’s foundry capabilities. That drove us to really hone the techniques in energy efficiency. We applied all of that to the Zen core design. Then we leveraged FinFET. That combination gives us tremendous scale.
Just to clarify: you guys said tonight that your thermal design power will be “competitive” with Intel. What does that mean? Will you match them, TDP for TDP?
As you heard Jim Anderson say, we’re not going to match TDPs for TDPs. Because that’s the spec that goes out on each product as we ship. But what we said is that we’ll be competitive by core, and have competitive designs. That means that they have to drop into the ecosystem. And that means form factors and product specifics.
Does that mean tablets, too?
What we’ve said is that with this generation of products we’ll put it into the APUs. What we said tonight is that will come out in the second half of 2017. It’s far enough that we haven’t released any details of the specific form factors it’s going into, but it’s an APU. You’ll certainly see it beginning with the notebook market. That’s our sweet spot today.
One point on the Zen slides mentioned that you’re optimizing for single-core performance—most workloads that consumers run aren’t heavily multithreaded. Does that mean you’re going to adopt a higher clock speed or “turbo boost” strategy with Zen?
Well, interesting. What you’re seeing with Zen is its versatility. What is Cinebench trying to represent, or the benchmark that we showed today? They show off—we show off a number of multithreaded applications. And you saw that we’ve done a true simultaneous multithreaded implementation. That really helps double the effective cores for those applications.
But we did it—and I mentioned this in the presentation—by increasing the resources in that execution pipeline. So if you are running single-thread, you get the benefit of these additional resources. It’s a versatile core; it’s going to play well to single-threaded and multithreaded applications.
The AM4 socket will support both your APUs as well as Summit Ridge?
Correct. This will not be a new socket.
You’ve mentioned that you’ve proven the 14nm FinFET technology out on your “Polaris” GPU. Can you give us an idea what the manufacturing yields have been for Polaris, whether they’ve met demand, and what we might expect for Zen?
We’ve had great demand for Polaris. We met our build expectations and then turned out and sold out after that with Polaris. That ramp is in full flight, and what I’ll tell you is that 14nm is meeting our expectations, and our plans, and I can tell you that we expect it to do the same for this SoC as it ramps into the Summit Ridge and Naples products.
You have a joint venture in China, sharing x86 technology for server SoCs. Will you be sharing the Zen “Naples” technology with them as well?
We didn’t share the specifics of that agreement, but it is a joint venture, targeting server.
And does your IP relationship with Intel allow for this?
There is no impediment on the joint venture that we formed.
Hitting a 40 percent improvement in instructions per clock is like throwing a football two miles. Did you really achieve that?
We did it. We’ve demonstrated it. We just went public with it at the [May 2015] analyst day. That target was actually set at design launch.
Custom microprocessor designs are long and arduous. And the triple constraints of what I shared—performance, throughput, and power efficiency—they play against each other. It’s very hard to, in fact, to achieve all three. But that’s what the team pulled off. It’s just a maniacal execution by the team.
I’ve just seen so many products whose performance targets are announced, and upon release, it’s like, whoa.
The industry is littered with missed microprocessor targets.
You’re discussing this next week at the Hot Chips conference, and one of the questions that’s always asked is the size of the die and the transistor count. What are they?
We’re not releasing the transistor count.
In the last few years, it seems like AMD has become more of a semi-custom company, with the APUs you’ve supplied for the game consoles really helping keep AMD afloat. With Zen, do you expect to return to a more PC-specific focus?
We’ve actually been clear—our business objective is a mix. No change in that strategy. Now the arsenal is strengthened. We can go after that high-performance desktop. We can re-enter that x86 server market. That’s growth on our AMD product side. Now that new CPU—that Zen core and our rejuvenated graphics roadmap, those are IPs, those are arsenals that can be tapped into future semi-custom.
But it does also go back to your comment—how did you achieve 40 percent improvement, how did you pull it off? We are one of the very few companies that understands how to put together leading-edge, high-performance chip designs. And that’s why we’ve been successful in the semi-custom industry. You have to have the IP, and you have to know how to put together and deliver high-performance design. That’s what we have at AMD.
Go back through AMD’s history of chip designs: the K6, the Athlon, and others. Do you think this eclipses those?
Well, that’s why I showed the historic perspective. We absolutely believe that this will be an historic inflection point, as were those you referenced.
Our foot is not coming off the gas pedal, and we’re hard at work on next-generation designs.
Was the “Zen+” reference today a formal code name, or just indicative of future products?
Not a formal name, just the next generations that the design teams are hard at [work].
With Zen, you told the team that you wanted a 40 percent improvement in IPC, but with the same power as the Excavator core. Do you have similar marching orders for these forthcoming Zen cores?
We have leapfrog design teams, so we didn’t wait for Zen to be completed to start the next generation. They’re hard at it. Of course we’re not putting out any specifics, but every generation will face the same task that the Zen team faced: how do you drive performance, how do you drive throughput, how do you drive efficiency? That triple objective will not change, going forward in our roadmap.
With Naples, can we assume you have a four-way processor planned?
We’ve shared today Summit Ridge, and then the 2P configuration on Naples.
Your rival Intel has spent the entire week talking about sensors, embedded, and the Internet of Things. You’ve listed “embedded” as a market for Zen. Does this mean that Zen has an IoT future?
Many of the IoT devices that are leveraging sensors are taking...at any point around you they’re gathering information. They need to be very efficient, and they need to be low cost, because you need a plethora of them.
IoT for us answers a question: What do you do with all that data that those sensors are creating? IoT...creates a massive, massive amount of data, and you’ll need a hub to collect that, an edge of network, and then an expanded server and cloud capability to run those IoT devices. That’s what we’re targeting, with what we shared today.
The last time AMD represented a threat to Intel was with Athlon, and I remember that it was hard to get motherboards. There just weren’t a lot of motherboards made. There were rumors of threats from Intel. Do you expect anything similar this time around? That’s one way to slow you down.
I can tell you that there is tremendous excitement and pull from the market for the Zen core. Great interaction for these products, with our customers. Markets want competition; it’s that simple.
Lisa Su used the phrase “the best is yet to come” to describe the future of AMD. What’s the sentiment within your organization, the engineers who are making these products? Do they believe that they can offer true competition to Intel’s products, and not just a cheaper alternative as they did during AMD’s darker years?
The engineers at AMD are incredibly excited and they’re incredibly proud. Again, they’ve been at this for years. They’ve seen that there’s been doubters out there as to our ability to deliver, and to come back in this industry. They’ve kept their heads down; they’ve been focused, they’ve delivered. It’s a proud moment when they see their handiwork come to fruition, delivering on the design objectives they set years ago. And they know AMD is one of only a couple companies in the industry that can deliver this kind of high-performance CPU to the market.
Correction: Due to a transcription error, a previous version of this interview characterized the 7th-generation "Excavator" APUs as being manufactured on a 20-nm process.