The landmark Moore’s Law observation, which is now more than 50 years old, keeps shapeshifting as the physical challenges of making smaller chips mounts.
Many scientists agree that Moore’s Law is dying, but Intel is clinging on to it for dear life. It has been Intel’s guiding light for making chips smaller, faster and cheaper.
Now, Intel is changing the way it measures process technology advancements, which will help the company continue to boast about hitting key Moore’s Law metrics in terms of economics and the shrinking of chip sizes.
Primarily, the company is changing the way it measures logic transistor density, using a wider cell width.
“Moore’s Law is not dead, at least not for us,” said Stacy Smith, Intel’s executive vice president leading manufacturing, operations and sales, during an event to talk about manufacturing in San Francisco on Tuesday.
At its heart, Moore’s Law states that the cost of making chips goes down while the capabilities go up. Intel’s interpretation of Moore’s Law has changed multiple times. Initially, Intel was doubling transistors every 18 months, which then expanded to two years. On its most recent 14-nanometer process, that time line expanded to three years.
With the new measurements, Intel will be able to boast that its manufacturing improvements are surpassing Moore’s Law. The company also said it would cut the manufacturing cost per transistor by half with each new manufacturing process, which is in line with Moore’s Law.
But there are caveats to the new metrics. Intel is making multiple changes and introducing more chip architectures on each manufacturing process, and advancing to new processes at a slower pace.
Later this year, Intel will start making chips using the 10-nm process, which is being projected to last for roughly three years. After that the company will move to 7-nm, and Smith said there is “visibility” to the 5-nm process.
Rival fabs are now catching up with Intel, which had a manufacturing advantage for more than a decade. Samsung is making 10-nm chips for mobile devices, with one example being Qualcomm’s Snapdragon 835 — though Intel says its latest 14-nm chips are as good as the 10-nm chips from Samsung and GlobalFoundries.
Intel’s reformulation of Moore’s Law metrics is an attempt by the company to make up for lost time and a messy move to the 14-nm process from the previous 22-nm process, said Nathan Brookwood, principal analyst at Insight 64, who was at the Tuesday event.
Manufacturing issues on 14-nm in early 2014 meant Intel couldn’t achieve the cost or transistor density it wanted. As the 14-nm process matured, Intel started hitting those metrics, and had to press the restart button on its Moore’s Law projections. Chip advances have also contributed to reconsideration of the metrics.
“There is an amount of reasonableness to it,” Brookwood said, saying Intel remains ahead of rivals on chip density. Intel has an advantage on gate and metal pitches, giving its chips more density.
Intel will continue to deliver new PC and server chip architectures every year, with a minimum 15 percent performance improvement per generation. Coming next will be 8th Generation Core chips made on the 14-nm process, an unprecedented fourth chip architecture on the process technology. Intel will also be releasing PC chips code-named Cannon Lake based on the 10-nm process later this year.
That could create a scenario where Intel has 14-nm and 10-nm PC chips hitting the market at the same time. That could create issues in the branding of chips and confusion among buyers looking to acquire the latest and greatest Intel processors.
Intel last month said it will stress performance benefits to chip buyers, while playing down the role of process technology.
For the past few years, Intel has moved away from the once-famous “tick-tock” scaling, where new processes were “ticks” and new architectures were “tocks.” It is switching to what the company calls “hyperscaling” advances, a new metaphor announced on Tuesday to describe manufacturing advances. Intel will now use the “+” and “++” symbols to mark advances in the 14-nm and 10-nm processes.
Hyperscaling will help Intel cram new architectural and process innovations without hurrying a move to a new manufacturing process.
New lithography techniques like quad-patterning will help Intel take advantage of the economic benefits described by Moore’s Law, said Kaizad Mistry, vice president and co-director of logic technology development at Intel. That will improve transistor density, which also brings performance and power-efficiency enhancements.
Intel is projecting 15 percent improvements in performance with each advance in the 10-nm + and ++ processes. Intel will also reduce the chip size to pack I/O, logic and SRAM blocks into a much smaller area.
Intel is doing what the company calls “aggressive pitch scaling,” which involves packing wires, transistors and 3D fins closer together. On the 10-nm process, that helps provide transistor density improvement that is 2.7 times better than the 14-nm process, an advance that Intel said is well above the Moore’s Law average.
The chip maker is also bringing the ability to mix and match different cores into an integrated system-on-chip. The cores could be made using different manufacturing processes. It’s also much how ARM chips are designed and made, a process that integrates CPUs, modems, graphics processors and other cores into a single chip.