IBM’s next-gen chips may swap silicon for carbon nanotubes
By Jay Alabaster
IBM has hit a milestone in its quest to come up with a successor to silicon computer chips.
The company said Sunday its research into semiconductors based on carbon nanotubes, or CNTs, has yielded a new method to accurately place them on wafers in large numbers. The technology is viewed as one way to keep shrinking chip sizes once current silicon-based technology hits its limit.
IBM said it has developed a way to place over 10,000 transistors made from CNTs on a single chip, two magnitudes higher than previously possible. While still far below the density of commercial silicon-based chips—current models in desktop computers can have over a billion transistors—the company hailed it as a breakthrough on the path to using the technology in real-world computing.
The company made the announcement to mark the publication of an article detailing the research in the journal Nature Nanotechnology.
Intel’s latest processors are built using silicon transistors with 22-nanometer technology, and simpler NAND flash storage chips have been demonstrated using “1X” technology somewhere below that, but modern manufacturing is nearing its physical limits. Intel has predicted it will produce chips using sizes in the single digits within the next decade.
Guided by Moore’s Law
The march toward ever-smaller transistors has produced chips that use less power and can run faster, but can also be made at lower cost, as more can be crammed onto a single wafer. The increasing number of transistors on a given amount of silicon was famously predicted by Gordon Moore, co-founder of Intel, who predicted they would double steadily over time.
Carbon nanotubes, tube-shaped carbon molecules, can also be used as transistors in circuits, and at dimensions of less than 10 nanometers. They are smaller and can potentially carry higher currents than silicon, but are difficult to manipulate at large densities.
Unlike traditional chips, in which silicon transistors are etched into circuit patterns, making chips using CNTs involves placing them onto a wafer with high accuracy. Semiconducting CNTs also come mixed with metallic CNTs that can produce faulty circuits, and must be separated before they are used.
IBM said its latest method solves both issues. The company’s researchers mix CNTs into liquid solutions that is then used to soak specially prepared substrates, with chemical “trenches” to which the CNTs bond in the correct alignment needed for electrical circuits. The method also eliminates the non-conducting metallic CNTs.
The company said the breakthrough will not yet lead to commercial nano-transistors, but is an important step along the way.
Before they can challenge silicon, however, they must also pass an often-overlooked part of Moore’s law—affordability. His law applies to “complexity for minimum component costs,” or what consumers are likely to see in the market.
Note: When you purchase something after clicking links in our articles, we may earn a small commission. Read ouraffiliate link policyfor more details.